Thesis BELLE2-MTHESIS-2023-004

Study on first-level trigger of the Belle II experiment using upgraded silicon strip detector

Tomoyuki Shimasaki ; Takeo Higuchi

The University of Tokyo Tokyo

Abstract: In order to explore new physics beyond the Standard Model, the Belle II experiment plans to accumulate the integrated luminosity of 50 ab−1. The SuperKEKB collider, an accelerator used in the Belle II experiment, is designed to achieve the world’s highest luminosity of 6.0×1035 cm−2s−1 so that we can accumulate the target data volume in reasonable time scale of about 15 years. However, the data generated by SuperKEKB with such high luminosity is so large that the data acquisition (DAQ) system cannot store all of it due to the limited bandwidth of the sampling rate and data transfer of each Belle II sub-detector. For this reason, the first-level trigger system is employed, which determines if each event is of interest and selects the data to be stored. For stable operation of the DAQ system, the maximum average Level-1 trigger rate is set to be 30 kHz. However, the trigger rate is expected to exceed the limit at the target luminosity in the future due to harsh beam backgrounds. The major contributor to the background trigger rate is considered to be particles produced outside of the interaction point (IP), which are called Off-IP particles. They cannot be sufficiently rejected by the current Level-1 trigger system due to its low capability to identify particle production positions. Therefore, a new Level-1 trigger system with higher position resolution is desired. The Silicon Vertex Detector (SVD), which is a type of silicon strip detector and responsible for particle decay vertex reconstruction in cooperation with the Pixel Detector (PXD). It has high position resolution for charged particles, however, has no function for the Level-1 trigger. The Thin Fine-Pitch SVD (TFP-SVD) is being developed as the next generation vertex detector. It will have higher position resolution than the current SVD and have function for the Level-1 trigger. Therefore, we developed new trigger algorithm using the TFP-SVD in simulation to efficiently reject Off-IP particles and suppress the background trigger rate. As a result, we confirmed that the TFP-SVD trigger has sufficient trigger efficiency and Off-IP particle rejection power. Furthermore, fake triggers, which are derived from fake tracks reconstructed by harsh background sensor hits, can be suppressed by the TFP-SVD trigger by combining with the current trigger system. By introducing the TFP-SVD trigger, it is expected that the upper limits of the trigger rate, 30 kHz, can be observed even at the target luminosity. After the simulation study, we implemented the TFP-SVD trigger as firmware and confirmed its feasibility.

Note: Presented on 27 01 2023
Note: MSc

The record appears in these collections:
Books, Theses & Reports > Theses > Masters Theses

 Record created 2023-01-30, last modified 2023-01-30

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